{"files_to_attach":["\/Library\/Logs\/DiagnosticReports\/Kernel-2022-01-18-093531.panic"],"log_path":"\/Library\/Logs\/DiagnosticReports\/Kernel-2022-01-18-093531.panic","panic_string":"*** MCA Error Report ***\nCPU W\u0019<\fine 7\b]<k Ar7\f\u001dMectu'^\fTrror\u0007DX^p (C\u0007Z*\u0007InteG\r%\u001a CorW\fEZ) i5WU&\u00067U C\u0007Z\n\u0004 2.9\u0007v\b), CPW\u001aI( 0x3\u0007fFH)\r\nCw-^, 0 \r'\u0001\u0004\u0014A32_W98vSTATW:Z\u0007xFE0\u0007\u0006\u0006\u00060008\u0007\u0006F\u00060\r\n \u0007\u0014\u001982_MC7v;HL=0x\u0007V!\u0001 IA3'v[93_ADG(Z\u0007xFFFghh\b0171\u0007\u0016\u0006V7\r\n \u0007\u0014\u001982_MC7v[\u0019SC=0\u0007ohhFFF8\u0007\u0016v\u00160105wV!1ore:\u0007\u0004\u0006T\n  I\u00178&vMC5_7J\u001aHUS=0\u0007_X\b0000\u0007\u0006\u0006F0110'X!\u0001 IA3'v[95_CTGY\u0007\u00060\r\n \u0007\u0014\u001982_MCWv\u001bHDR=0\u0007ohx0FB8\u0007V!\u0001 IA3'v[95_MI7:X\u0007x388\u0007\u0006\u0006\u0006086\r'1x-e: 0\u0007T!\u0001 IA3'v[96_ST\u0017HZ:=0xEW\b\u0006\u00060000\u0007F\u0006\u001610B\r'\u0001\u0004\u0014A32_W9hvCTL=\u0007\u0006\u000fV\n  I\u00178&vMC6_\u0017HH(=0xFgx\u0006fBC0\r'\u0001\u0004\u0014A32_W9hvMISCW\u0007\u0006?8800\u0007\u0006\u0006\u00066\r\n\n\n*** Device Tree ***\n{\n    \"pcie_cfg_base\" : \"0xe0000000\",\n    \"pci_devices\" :\n    {\n        \"0x0\" : \"MCHC@0\",\n        \"0x18000\" : \"HDAU@3\",\n        \"0x10000\" : \"IGPU@2\",\n        \"0xa0000\" : \"XHC1@14\",\n        \"0xac000\" : \"SPI1@15,4\",\n        \"0xa8000\" : \"SDMA@15\",\n        \"0xb0000\" : \"pci8086,9cba@16\",\n        \"0xd8000\" : \"HDEF@1B\",\n        \"0xe0000\" : \"RP01@1C\",\n        \"0xe1000\" : \"RP02@1C,1\",\n        \"0xe2000\" : \"RP03@1C,2\",\n        \"0xe4000\" : \"RP05@1C,4\",\n        \"0x300000\" : \"RP03@1C,2\/IOPP\/ARPT@0\",\n        \"0x200000\" : \"RP02@1C,1\/IOPP\/CMRA@0\",\n        \"0x500000\" : \"RP05@1C,4\/IOPP\/UPSB@0\",\n        \"0x600000\" : \"RP05@1C,4\/IOPP\/UPSB@0\/IOPP\/DSB0@0\",\n        \"0x630000\" : \"RP05@1C,4\/IOPP\/UPSB@0\/IOPP\/DSB4@6\",\n        \"0x618000\" : \"RP05@1C,4\/IOPP\/UPSB@0\/IOPP\/DSB1@3\",\n        \"0x700000\" : \"RP05@1C,4\/IOPP\/UPSB@0\/IOPP\/DSB0@0\/IOPP\/NHI0@0\",\n        \"0x620000\" : \"RP05@1C,4\/IOPP\/UPSB@0\/IOPP\/DSB2@4\",\n        \"0x628000\" : \"RP05@1C,4\/IOPP\/UPSB@0\/IOPP\/DSB3@5\",\n        \"0xe5000\" : \"RP06@1C,5\",\n        \"0xfb000\" : \"SBUS@1F,3\",\n        \"0xfe000\" : \"pci8086,9ca4@1F,6\",\n        \"0xf8000\" : \"LPCB@1F\",\n        \"0x400000\" : \"RP06@1C,5\/IOPP\/SSD0@0\"\n    },\n    \"device_mmio\" :\n    {\n        \"PCI0@0\" :\n        [\n            { \"a\" : \"0xcf8\", \"s\" : \"0x8\" }\n        ],\n        \"PCI0@0\/AppleACPIPCI\/IGPU@2\" :\n        [\n            { \"a\" : \"0x7fa0000000\", \"s\" : \"0x1000000\" },\n            { \"a\" : \"0x7f90000000\", \"s\" : \"0x10000000\" }\n        ],\n        \"PCI0@0\/AppleACPIPCI\/HDAU@3\" :\n        [\n            { \"a\" : \"0x7fa1014000\", \"s\" : \"0x4000\" }\n        ],\n        \"PCI0@0\/AppleACPIPCI\/XHC1@14\" :\n        [\n            { \"a\" : \"0x7fa1000000\", \"s\" : \"0x10000\" }\n        ],\n        \"PCI0@0\/AppleACPIPCI\/SDMA@15\" :\n        [\n            { \"a\" : \"0xc181a000\", \"s\" : \"0x1000\" }\n        ],\n        \"PCI0@0\/AppleACPIPCI\/SPI1@15,4\" :\n        [\n            { \"a\" : \"0xc1819000\", \"s\" : \"0x1000\" }\n        ],\n        \"PCI0@0\/AppleACPIPCI\/pci8086,9cba@16\" :\n        [\n            { \"a\" : \"0x7fa1019100\", \"s\" : \"0x20\" }\n        ],\n        \"PCI0@0\/AppleACPIPCI\/HDEF@1B\" :\n        [\n            { \"a\" : \"0x7fa1010000\", \"s\" : \"0x4000\" }\n        ],\n        \"PCI0@0\/AppleACPIPCI\/RP02@1C,1\/IOPP\/CMRA@0\" :\n        [\n            { \"a\" : \"0xc1700000\", \"s\" : \"0x10000\" },\n            { \"a\" : \"0x7f80000000\", \"s\" : \"0x10000000\" },\n            { \"a\" : \"0xc1600000\", \"s\" : \"0x100000\" }\n        ],\n        \"PCI0@0\/AppleACPIPCI\/RP03@1C,2\/IOPP\/ARPT@0\" :\n        [\n            { \"a\" : \"0xc1400000\", \"s\" : \"0x8000\" },\n            { \"a\" : \"0xc1000000\", \"s\" : \"0x400000\" }\n        ],\n        \"PCI0@0\/AppleACPIPCI\/RP05@1C,4\/IOPP\/UPSB@0\/IOPP\/DSB0@0\/IOPP\/NHI0@0\" :\n        [\n            { \"a\" : \"0xc1900000\", \"s\" : \"0x40000\" },\n            { \"a\" : \"0xc1940000\", \"s\" : \"0x1000\" }\n        ],\n        \"PCI0@0\/AppleACPIPCI\/RP06@1C,5\/IOPP\/SSD0@0\" :\n        [\n            { \"a\" : \"0xc1500000\", \"s\" : \"0x2000\" }\n        ],\n        \"PCI0@0\/AppleACPIPCI\/SBUS@1F,3\" :\n        [\n            { \"a\" : \"0x7fa1019000\", \"s\" : \"0x100\" }\n        ],\n        \"PCI0@0\/AppleACPIPCI\/pci8086,9ca4@1F,6\" :\n        [\n            { \"a\" : \"0x7fa1018000\", \"s\" : \"0x1000\" }\n        ],\n        \"DMAC\" :\n        [\n            { \"a\" : \"0x0\", \"s\" : \"0x20\" },\n            { \"a\" : \"0x81\", \"s\" : \"0x11\" },\n            { \"a\" : \"0x93\", \"s\" : \"0xd\" },\n            { \"a\" : \"0xc0\", \"s\" : \"0x20\" }\n        ],\n        \"FWHD\" :\n        [\n            { \"a\" : \"0xff000000\", \"s\" : \"0x1000000\" }\n        ],\n        \"HPET\" :\n        [\n            { \"a\" : \"0xfed00000\", \"s\" : \"0x4000\" }\n        ],\n        \"IPIC\" :\n        [\n            { \"a\" : \"0x20\", \"s\" : \"0x2\" },\n            { \"a\" : \"0x24\", \"s\" : \"0x2\" },\n            { \"a\" : \"0x28\", \"s\" : \"0x2\" },\n            { \"a\" : \"0x2c\", \"s\" : \"0x2\" },\n            { \"a\" : \"0x30\", \"s\" : \"0x2\" },\n            { \"a\" : \"0x34\", \"s\" : \"0x2\" },\n            { \"a\" : \"0x38\", \"s\" : \"0x2\" },\n            { \"a\" : \"0x3c\", \"s\" : \"0x2\" },\n            { \"a\" : \"0xa0\", \"s\" : \"0x2\" },\n            { \"a\" : \"0xa4\", \"s\" : \"0x2\" },\n            { \"a\" : \"0xa8\", \"s\" : \"0x2\" },\n            { \"a\" : \"0xac\", \"s\" : \"0x2\" },\n            { \"a\" : \"0xb0\", \"s\" : \"0x2\" },\n            { \"a\" : \"0xb4\", \"s\" : \"0x2\" },\n            { \"a\" : \"0xb8\", \"s\" : \"0x2\" },\n            { \"a\" : \"0xbc\", \"s\" : \"0x2\" },\n            { \"a\" : \"0x4d0\", \"s\" : \"0x2\" }\n        ],\n        \"MATH\" :\n        [\n            { \"a\" : \"0xf0\", \"s\" : \"0x1\" }\n        ],\n        \"LDRC\" :\n        [\n            { \"a\" : \"0x2e\", \"s\" : \"0x2\" },\n            { \"a\" : \"0x4e\", \"s\" : \"0x2\" },\n            { \"a\" : \"0x61\", \"s\" : \"0x1\" },\n            { \"a\" : \"0x63\", \"s\" : \"0x1\" },\n            { \"a\" : \"0x65\", \"s\" : \"0x1\" },\n            { \"a\" : \"0x67\", \"s\" : \"0x1\" },\n            { \"a\" : \"0x80\", \"s\" : \"0x1\" },\n            { \"a\" : \"0x92\", \"s\" : \"0x1\" },\n            { \"a\" : \"0xb2\", \"s\" : \"0x2\" },\n            { \"a\" : \"0xffff\", \"s\" : \"0x1\" },\n            { \"a\" : \"0x1800\", \"s\" : \"0x80\" },\n            { \"a\" : \"0x800\", \"s\" : \"0x80\" }\n        ],\n        \"RTC\" :\n        [\n            { \"a\" : \"0x70\", \"s\" : \"0x8\" }\n        ],\n        \"TIMR\" :\n        [\n            { \"a\" : \"0x40\", \"s\" : \"0x4\" },\n            { \"a\" : \"0x50\", \"s\" : \"0x4\" }\n        ],\n        \"SMC\" :\n        [\n            { \"a\" : \"0x300\", \"s\" : \"0x20\" },\n            { \"a\" : \"0xfef00000\", \"s\" : \"0x10000\" }\n        ],\n        \"EC\" :\n        [\n            { \"a\" : \"0x62\", \"s\" : \"0x1\" },\n            { \"a\" : \"0x66\", \"s\" : \"0x1\" }\n        ],\n        \"PDRC\" :\n        [\n            { \"a\" : \"0xfed1c000\", \"s\" : \"0x4000\" },\n            { \"a\" : \"0xfed10000\", \"s\" : \"0x8000\" },\n            { \"a\" : \"0xfed18000\", \"s\" : \"0x1000\" },\n            { \"a\" : \"0xfed19000\", \"s\" : \"0x1000\" },\n            { \"a\" : \"0xe0000000\", \"s\" : \"0x10000000\" },\n            { \"a\" : \"0xfed20000\", \"s\" : \"0x20000\" },\n            { \"a\" : \"0xfed90000\", \"s\" : \"0x4000\" },\n            { \"a\" : \"0xfed45000\", \"s\" : \"0x4b000\" },\n            { \"a\" : \"0xff000000\", \"s\" : \"0x1000000\" },\n            { \"a\" : \"0xfee00000\", \"s\" : \"0x100000\" }\n        ],\n        \"MEM2\" :\n        [\n            { \"a\" : \"0x20000000\", \"s\" : \"0x200000\" },\n            { \"a\" : \"0x40000000\", \"s\" : \"0x200000\" }\n        ]\n    }\n}\n\n\n"}